1. Field of the Invention
The present invention relates to an integrated circuit device module on which a plurality of integrated circuit devices, such as memories, are mounted, and in particular to an innovative structure for preventing ringing on a signal line along which a signal is supplied in parallel to a plurality of integrated circuit devices.
2. Related Arts
Integrated circuit modules, such as semiconductor memory modules having large structures and a plurality of integrated circuit devices mounted on a single board, are frequently mounted on motherboards. With such an integrated circuit module, an address signal, a control signal and a common signal, such as a clock, are supplied along branched signal lines to the integrated circuit devices mounted on the board.
FIG. 1 is a plan view of an example semiconductor memory module showing part of the signal lines. A driver device 12 and nine semiconductor memory devices 14 to 30 are mounted on the surface of a motherboard 10. Although not shown, nine other semiconductor memory devices are also mounted on the reverse face of the motherboard 10. An external card-edge terminal 32 of the motherboard 10 is inserted into a connector on a main motherboard, not shown.
An address signal, for example, originates at an output terminal N1 of the memory driver 12 and is supplied, along a common signal line 36 and along branch signal lines 38 and 40 on the obverse surface and branch signal lines 42 and 44 on the reverse surface which are connected at a node N3 with the signal line 36, to four groups of the 18 memory devices 14 to 30. A dumping resistor R1 is provided between the output terminal N1 and the terminal N2 of the common signal line 36. Input terminals corresponding to the memory devices are connected to the branch signal lines 38, 40, 42 and 44, which branch out in four directions at the node N3.
In the example shown in FIG. 1, a plurality of integrated circuit devices 14 to 30, such as memory devices, are longitudinally mounted on the motherboard 10. Nine other integrated circuit devices are mounted on the reverse face of the motherboard 10 at corresponding positions. Therefore, the driver device 12 is mounted longitudinally in the center portion, and a signal from the driver device 12 is transmitted along a signal supply line 36 and to a branch node N3, both of which are provided longitudinally in the center, and then to branched signal lines 38, 40, 42 and 44 which extend vertically in the longitudinal direction. With this arrangement, a signal is supplied to all the memory devices as symmetrically as possible.
The dumping resistor R1 is provided while taking into account the reflection of signals at the farthest terminals N4, N5, N6 and N7 of the branched signal lines 38, 40, 42 and 44. Specifically, the amplitude of a full-swing signal at the output terminal N1 of the driver device 12 is reduced by half through the provision of the dumping resistor R1, and reflected signals are superimposed on each other at the terminals N4 to N7 for the branched signal lines 38 to 44. Finally, the potential of the branched signal lines becomes a full-swing potential. That is, the signal passes through the output terminal N1, the node N2 and the branch node N3 and along the branched signal lines 38 to 44. The signals are reflected at the terminals N4 to N7 on the branched signal lines, and the reflected signals are returned via the respective branched signal lines to the node N3.
However, as is apparent from FIG. 1, the lengths of the branched signal lines 38 to 44 are not always equal. This is because, since the mounting direction for the integrated circuit devices 14 to 30, such as memory devices, on the motherboard 10 is the same, the positional relationship between their corresponding external terminals is reversed at upper and lower locations on the motherboard, as is shown in FIG. 1. As a result, on the obverse surface of the motherboard 10, for example, the distance from the node N3 to the terminal N4 is not the same as the distance from the node N3 to the terminal N5, and thus there is a time lag (a skew) between signals reaching integrated circuit devices positioned at their edges. A signal which reaches an edge is reflected, and the reflected signal is transmitted to the opposite terminal N4 or N5. Therefore, it has been found that, since a skewed reflected signal is superimposed on an original signal, and reflected signals having a phase difference interfere with each other, a vibrating waveform called ringing occurs.
FIG. 2 is a graph showing a signal waveform for a simulation at the nodes N1 to N5 of the module in FIG. 1. FIG. 3 is a graph showing a signal waveform when the first 4 nsec period in FIG. 2 is enlarged along the time axis. As is shown by the signal waveform in FIG. 2, a pulse signal having an amplitude of 3 V rises and falls within a short time period at the output terminal N1 of the device driver 12. At the node N2, due to the dumping resistor R1, the inclination of the rise of a signal is xc2xd.
Because of the existence of a dumping resistor R2, a signal at the node N2 rises to an amplitude of 1.5 V at an inclination which is half that for the rise of the signal at the output terminal N1. Since the module in FIG. 1 is so designed that the rising time is shorter than the reciprocal transmission time for a supplied signal, the potential at the node N2 is temporarily maintained at 1.5 V. Then, when the signal reflected at the node N4 or N5 is superimposed on the original signal, the potential at the node N2 is raised to 3 V. Similarly, a signal at the output terminal N1 falls at 3 V, whereas a signal at the node N2 first falls to 1.5 V, due to the dumping resistor R1, and then to 0 V, due to the superimposing of the signals reflected at the nodes N4 and N5.
Since the distance between the branch node N3 and the node N4 is shorter than the distance between the branch node N3 and the node N5, first a signal at the node N4 rises, and then, after being slightly skewed, a signal at the node N5 rises. Since the signal reflected at the node N4 or N5 is superimposed on the original signal, the resultant signal does not have a step shaped waveform, as is shown for the node N2, and substantially rises and falls at the same inclination as that for the output terminal N1.
However, since the reflected signals interfere with each other due to skewing of signals at the nodes N4 and N5, ringing in the signals at the nodes N4 and N5 occurs, as is shown in the graphs. Such ringing causes the vibration of signals input to the memory devices 30 (I) and 14 (A) at the nodes N4 and N5, respectively, and also causes an erroneous operation to be performed.
Such input signal vibration occurs not only with address signals, but also with control signals and clock signals which are supplied in common by the driver device 12. In other words, for a module on which a plurality of logic devices are mounted, the same vibration problem occurs with a control signal and a clock signal which are used in common.
To resolve the above problem, it is one objective of the present invention to provide an integrated circuit device module for eliminating vibration, which accompanies a difference in the lengths of branched signal lines, of signals which are input to integrated circuit devices located at the distal ends of branched signal lines.
It is another objective of the present invention to provide an integrated circuit device module which resolves a problem concerning interference occurring between reflected signals at the distal ends of branched signal lines.
It is an additional objective of the present invention to provide an integrated circuit device module wherein signal skewing at the distal ends of branched signal lines is eliminated.
It is a further objective of the present invention to provide an integrated circuit device module wherein signal interference which occurs at branched signal lines is eliminated.
To achieve the above objectives, according to the present invention, for a module in which a plurality of integrated circuit devices are mounted in parallel, the inductance generated by the unit length of a branched signal line on a motherboard is so set that it is smaller for a branched signal line having a longer distance from its branching point to its distal end, and is so set that it is larger for a branched signal line having a shorter distance from its branching point to its distal end, so that the time required for transmission of a signal from the branching point to the distal end of each branched signal line is the same.
To view the above in a different way, a branched signal line, on the motherboard, having a longer distance from its branching point to its distal end has a smaller characteristic impedance than a shorter branched signal line, so that the time required for transmission of a signal from the branching point to the distal end of each branched signal line is the same.
More specifically, the width of a longer branched signal line is larger than that of a shorter branched signal line. As a result, the inductance generated by the unit length of the longer signal line is smaller than the inductance generated by the unit length of the shorter signal line. If the width of a signal line is simply increased, its inductance is reduced, and at the same time the total capacity of branched signal lines formed opposite a power wiring layer, such as a ground wiring layer, is increased. However, the terminals of a plurality of integrated circuit devices whereof the terminal capacity is greater than the signal line capacity are also connected to the branched signal lines. Therefore, even though the signal line capacity is increased, the ratio of the increase to the overall capacity, including the terminal capacity, is not too great. As a result, when the width of a longer branched signal line is increased, the inductance can be reduced and the time required for the transmission of signal along the branched signal line can be reduced. Of course, instead of this, a shorter branched signal line may be narrowed.
According to another structure, a smaller area opposite a power wiring layer for a shorter signal line is provided, such as a ground wiring layer, and a larger area opposite a power wiring layer is provided for a longer signal line. More specifically, a power wiring layer opposite a shorter branched signal line is so formed that its portions are intermittently removed, and a power wiring layer opposite a longer branched signal line is continuously formed.
With this structure, the inductance generated by the unit length of a shorter branched signal line is increased. As a result, the time required for the transmission of a signal along the shorter signal line is increased. Since a signal transmission delay time for a longer branched signal line equals the signal transmission time for a shorter branched signal line, the interference due to the reflected signals can be prevented. As a result, the conventional problem involving the vibration of signals at the distal ends can be resolved.
According to an additional structure, one part of a shorter branched signal line is formed of a material containing a ferromagnetic substance. For example, a shorter branched signal line may be so formed for which a copper thin film is selectively plated with a ferromagnetic material, such as Ni. The inductance generated by the shorter branched signal line is increased by the deposition of the ferromagnetic material.
According to a further structure, the distal ends of branched signal lines are connected together. Specifically, the distal ends of branched signal lines formed on the obverse surface and on the reverse surface of the motherboard are connected together to form a loop, so that signal lines which are separate at the branch point have the same length. As a result, signals transmitted along signal lines on the same loop do not interfere with each other, and the conventional ringing problem due to interference can be eliminated.
According to one aspect of the present invention, an integrated circuit device module, in which a plurality of groups of integrated circuit devices are mounted on a motherboard, comprises:
a plurality of branched signal lines, formed on the motherboard and extending from a common branch node to individual distal ends, along which a common signal is supplied to the groups of integrated circuit devices respectively,
wherein each of the plurality of branched signal lines comprises a first branched signal line having a first length from the branch node to the distal end, and a second branched signal line having a length from the branch node to the distal end which is shorter than the first length, and an inductance generated by the unit length of the first branched signal line is smaller than an inductance generated by the unit length of the second branched signal line.
According to another aspect of the present invention, an integrated circuit device module, in which a plurality of groups of integrated circuit devices are mounted on a motherboard, comprises:
a plurality of branched signal lines, formed on the motherboard and extending from a common branch node to individual distal ends, along which a common signal is supplied to the groups of integrated circuit devices respectively,
wherein each of the plurality of branched signal lines comprises a first branched signal line having a first length from the branch node to the distal end, and a second branched signal line having a length from the branch node to the distal end which is shorter than the first length, and distal ends of the first and the second branched signal line are connected together to form a signal line loop.